Explore projects

Xilinx XPS IP core of the Xillybus DMA interface, configured with 4 FIFOs (two host to FPGA, two FPGA to host)

Pseudo-random number generator, using cellular automata and a feed-back loop.

FPGA implementation of GZip compressor

Sound source localization utilizing 4, 8, or 16 PDM microphones and the Delay-Sum algorithm

FPGA implementation of the Baptista encryption algorithms

Pynq integration of the Gzip FPGA compressor

Programming framework/library for MRA (Map-Reduce Accelerator)

Sound source localization utilizing 4, 8, or 16 PDM microphones and the Delay-Sum algorithm

Utilitary circuits for AXI4 communication - register access over AXI4-Lite, data streaming with AXI Stream, DMA over AXI4-Burst, etc

Digital circuit which samples a pair of I2S microphones and transmits the samples to a PC, via UART, on request. Useful for sound recording, sound source localization, etc.

Split-LUT-Carry (SLC) Self-Programmable Cellular Automaton (SPCA) Pseudo-Random Number Generator

Final project for RC