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Xilinx XPS IP core of the Xillybus DMA interface, configured with 4 FIFOs (two host to FPGA, two FPGA to host)

Board support files for the V5IP7000 ASIC prototyping platform with the Virtex-5 LX330 FPGA. Designed for use with Xilinx ISE Platform Studio

Split-LUT-Carry (SLC) Self-Programmable Cellular Automaton (SPCA) Pseudo-Random Number Generator

Linear Image Filtering using HSL

General-purpose Instruction Computer Architecture is a 8-bit MCU/CPU RISC architecture

Java app made to automate generation of support files required by Xilins XPS, in order to easily connect a user-defined core into a Xilinx system.

Digital circuit which samples a pair of I2S microphones and transmits the samples to a PC, via UART, on request. Useful for sound recording, sound source localization, etc.

FPGA implementation of GZip compressor

Sound source localization utilizing 4, 8, or 16 PDM microphones and the Delay-Sum algorithm

Sound source localization utilizing 4, 8, or 16 PDM microphones and the Delay-Sum algorithm

Pseudo-random number generator, using cellular automata and a feed-back loop.