A hybrid adaptive clock manager for Xilinx FPGAs. Adding to the functionality of the Mixed-Mode Clock Manager block, the HACM is capable of performing fine-grained frequency scaling.
Pseudo-random number generator, using cellular automata and a feed-back loop.
Digital circuit which samples a pair of I2S microphones and transmits the samples to a PC, via UART, on request. Useful for sound recording, sound source localization, etc.
Board support files for the V5IP7000 ASIC prototyping platform with the Virtex-5 LX330 FPGA. Designed for use with Xilinx ISE Platform Studio