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The goal of this project is to create a flexible timetable generation service software for academic use.
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This project's goal is to create a server based application that will distribute the students to faculties based on a Shapley-Roth algorithm.
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Bubble sort implementation using OPINCAA for ConnexZync... again
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SW/HW which is used to start, shutdown or power-cycle equipment in the lab
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A Java tool to run quick multiple choices tests.
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Board support files for the V5IP7000 ASIC prototyping platform with the Virtex-5 LX330 FPGA. Designed for use with Xilinx ISE Platform Studio
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Board support files for the Memec V4MB development board, with Virtex-4 LX25/LX60/SX35 FPGA. Designed for use with Xilinx ISE Platform Studio
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Implemented solution to obtain an uniform distribution of cipher text after encrypting data with Baptista's algorithm.
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Digital circuit which samples a pair of I2S microphones and transmits the samples to a PC, via UART, on request. Useful for sound recording, sound source localization, etc.
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