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This project's goal is to create a server based application that will distribute the students to faculties based on a Shapley-Roth algorithm.

Bubble sort implementation using OPINCAA for ConnexZync

SW/HW which is used to start, shutdown or power-cycle equipment in the lab

Virtual Student Card

This project's goal is to create a server based application that will distribute the students to faculties based on a Shapley-Roth algorithm.

The DCAE Website.

Pseudo-random number generator, using cellular automata and a feed-back loop.

A Java tool to run quick multiple choices tests.

The goal of this project is to create a flexible timetable generation service software for academic use.

A hybrid adaptive clock manager for Xilinx FPGAs. Adding to the functionality of the Mixed-Mode Clock Manager block, the HACM is capable of performing fine-grained frequency scaling.

Bubble sort implementation using OPINCAA for ConnexZync... again

Xilinx XPS IP core of the Xillybus DMA interface, configured with 4 FIFOs (two host to FPGA, two FPGA to host)

A Java tool to run quick multiple choices tests.

Sound source localization utilizing 4, 8, or 16 PDM microphones and the Delay-Sum algorithm

Driver and usage scripts for Microchip Power/Energy Meter

Plugins adding HDL support in WebCAT

Board support files for the V5IP7000 ASIC prototyping platform with the Virtex-5 LX330 FPGA. Designed for use with Xilinx ISE Platform Studio